This application claims priority from Taiwan Patent Application No. 88121607, filed Dec. 9, 1999, incorporated herein by reference.
1. Field of the Invention
The present invention pertains to a semiconductor device process, and more specifically, to method of improving the gate oxide thinning issue at the trench corner.
2. Background of the Invention
With the advent of the integrated circuit (IC), forming trench structure in the semiconductor structure to increase the integrity has become more and more popular. The trench structure can be applied to a variety of semiconductor processes. For instance, the trench structure can use as trench capacitor to increase the integrity of the IC. Either deep trench or stacked structure can increase the electrode plate area so as to increase the capacitance. Furthermore, the trench isolation technology is widely used to semiconductor device isolation so as to improve the bird beak, which occupies larger planar area. Still, the trench diffused MOS transistor (DMOS) is a MOS transistor formed in the trench for the application to the high power IC.
However, a problem about the gate oxide thinning issue at the trench corners will occur when a thermal oxidation is carried out to form a gate oxide on the sidewall and the bottom of trench. As shown in FIG. 1, the corner denoted by 30 between the sidewall 10 and the bottom 20 shows the thinning gate oxide. As is known skilled in the art, the thinning corner gate oxide will result in leakage current issue. If the problem is not solved, the benefits associated with the recessed channel will be significantly canceled.
The present invention disclosed a method for improving gate oxide thinning issue at trench corners to prevent leakage current therefrom. The method comprises steps as follows. Firstly, a silicon substrate having a trench therein is provided. A HDPCVD technology to form a first oxide layer on the sidewall and the bottom of the trench is carried out. After performing an etchback to leave the first oxide layer on the bottom of the trench, a second oxide layer is formed on the first oxide layer and on sidewalls of the trench by a LPCVD technology. Thereafter, an isotropic etching is performed so as to remove a substantially portion of the second oxide layer and leave a remnant portion of second oxide layer on the trench corners. Consequently, the trench corners are smooth. Finally, a thermal oxidation to form a third oxide layer on the sidewall of the trench is carried to accomplish the gate oxide formation.